1. Technical Field
The present invention relates to a semiconductor device, in further detail, to a semiconductor device having electrode terminals corresponding to a semiconductor element connected to each of a plurality of pads formed on a mounting surface of a wiring substrate in the form of a flip-chip.
2. Related Art
A semiconductor device shown in FIG. 4 has electrode terminals 106 corresponding to a semiconductor element 104 connected to each of a plurality of pads 102 formed on amounting surface of a wiring substrate 100 in the form of a flip-chip.
An under-filling agent (epoxy-based thermo-hardening type resin, etc.) is filled in the gap between such a semiconductor element 104 and the mounting surface of the wiring substrate 100, thereby forming an under-filling layer 108. The under-filling agent is usually in a liquid-state. After the under-filling agent is filled in the gap between the semiconductor element 104 and the mounting surface of the wiring substrate 100, the agent is hardened by a heating process.
However, since the under-filling agent is in a liquid-state, a part thereof flows out on a solder-resist layer 107, which covers the mounting surface of the wiring substrate 100 exposed from mounted semiconductor element 104 when the under-filling agent is filled in the gap between the semiconductor element 104 and the mounting surface of the wiring substrate 100. Accordingly, as shown in FIG. 4, where peripherally disposed pads 110 are formed in the vicinity of the outer circumferential edge of the wiring substrate 100, a dam 112 or a recessed groove (not illustrated) is provided in order to prevent the under-filling agent from flowing out to the pads 110.
However, in accordance with advancements in downsizing of a semiconductor device in recent years, it has become impossible to provide a dam 112 or a recessed groove in order to prevent the under-filling agent from flowing out.
A semiconductor device not having such a dam 112 or a recessed groove is described in, for example, JP-A-No. 2005-175113. FIG. 5 is a front elevational view of the semiconductor device described in JP-A-No. 2005-175113, and FIG. 6 is a partial sectional view thereof. In the semiconductor device shown in FIGS. 5 and 6, a rectangular semiconductor element 204 has respective electrode terminals 206 thereof connected to pads 202 formed on the mounting surface of a wiring substrate 200 in the form of a flip-chip on the mounting surface of the wiring substrate 200.
The solder-resist layer 208 covers the mounting surface of the wiring substrate 200 along the outer circumferential edge of the wiring substrate 200 so that the mounting surface of the wiring substrate 200 is exposed to be band-shaped along the outer-circumferential edge of such a semiconductor element 204. Peripherally disposed pads 212 connected by the electrode terminals 206 of the semiconductor element 204 and the wiring pattern 210 are exposed to the bottom surface of the recessed part formed along the outer-circumferential edge of the wiring substrate 200 in the solder-resist layer 208.
In addition, a rectangular opening part 214 in which the solder-resist layer 208 is retracted and the mounting surface of the wiring substrate 200 is greatly exposed is formed at four corners of the semiconductor element 204.